Synopsys Freshers Recruitment 2019 | Intern | B.E/B.Tech | Hyderabad
|Position||Intern (Hardware Verification Engineer)|
|No. of Vacancies||Multiple|
|Salary||Best in industry|
|Published Date||12th APRIL , 2019|
- Bachelor’s degree in engineering is required as a minimum.
- Requires a 0+ years of related experience.
- Good Digital Design Knowledge is must.
- Microprocessor architecture knowledge is a big plus.
- Good written, verbal and analytical skills desired.
- Experience in following areas is preferred:
- HDL and Verification languages: SystemVerilog, Verilog.
- Programming skills: C, C++, assembly, Perl, makefile generation.
- Tools: RTL Simulators, eg VCS.
- The candidate will be a key member of the Synopsys DesignWare ARC Processor hardware team.
- Responsibility includes development of Verification Testbenches and automation, creation of tests – both directed and random, functional coverage model creation and report analysis, code coverage analysis, development of C-models, resolving mismatches between design and C-model, integration of third party and internal verification IP, regression management, review and improvement ofverification test suites.
How to Apply:
Interested and eligible candidates can apply for this drive by following the link given below.
Apply Link: Click here